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Memory Layout Engineers Jobs

Neugene International Solutions
Job Shared by MonsterIndia
Job Description
1. Drawing layouts for schematics created by Design Engineers in 7nm and other FinFET technologies
2. Experience on Memory Layout. Like RAM, ROM, SDRAM etc.
3. Good knowledge on Memory layout techniques like Area/Speed/Power optimization
4. Good knowledge on different Memory Architecture and Compilers
5. Knowledge on BIT cell, data line & Address line routing concepts
6. Effectively communicate with Design Engineers to clarify and interpret the layout requirements based on the schematics
7. Prepare layout floor-plan and review it with the Design Engineer
8. Create layouts in the Cadence Virtuoso CAD platform as per floor-plan
9. Run DRC, LVS and other verifications required by customer to ensure layout meets foundry requirements
10. Provide feedback to Design Engineers on any modifications to schematics after layouts are completed
11. Support RC-extraction, IR drop and other post-layout analysis of layouts as per Design Engineers requirements
12. Layout rework arising from quality issues identified during layout reviews without a material impact to customer€™s product schedules.
13. Experience: 4 to 10 years
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Qualities Needed for This Jobs
Finfet, Drawing Layouts , Memory Layout , Ram, Rom, Sdram, Memory Architecture, Memory Compilers, Bit Cell, Cadence Virtuoso Cad
Candidate Profile
Memory Layout Engineers With Min 4 Yrs Experince
Looking for Any Graduate / Post Graduate graduates profile.
More Information
Location Mumbai
Education Any Graduate / Post Graduate
Experience 4 (yrs)
Industry Computers / IT
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